LVDS drivers are commonly used with many different types of circuits, such as clocking circuitry. Looking specifically to clock products, especially those with multiple output channels, signal integrity from the LVDS drivers themselves as well as isolation of each LVDS driver from the other drivers are important. Lowering the supply voltage (1.8V, for example) would be desirable to help isolate the drivers, but drivers that operate in these voltage ranges encounter signal degradation issues (especially at high frequencies).
Turning FIG. 1, an example conventional circuit 100 employing an LVDS 102 can be seen. The driver 102 generally comprises current source 106 and complementary metal oxide semiconductor (CMOS) transistors M1 through M4. In operation, driver 102 receives complementary differential signals D and D (which are rail-to-rail signals) at the gates of transistors M1 through M4 and supplies a signal over transmission line 106 (which is terminated by resistor R1 to generally prevent line reflections) to receiver 104. Because of the use of these CMOS transistors or switches, though, amplitude degradation and noise increase with frequency, and there are significant switching transients. Another conventional alternative is to use a driver that employs bipolar transistors; however, these types of drivers generally require high voltages (typically 3.3V or greater).
Some other examples of conventional circuits are: U.S. Pat. No. 6,617,888; U.S. Pat. No. 6,791,377; and U.S. Patent Pre-Grant Publ. No. 2003/0227303.